Artificial Intelligence · Machine Learning · Quantitative Finance
Turning data into intelligent decisions
EPFL Computer Science student building machine learning systems and quantitative trading research — from neural networks implemented from scratch to a full backtesting platform tested on real market data.
French (native) English B2 Turkish B2
Featured project
Latest work: QuantLab
QuantLab Featured
Reproducible quantitative research platform, built solo
A Python framework that turns financial hypotheses into reproducible, leak-free research: data validation, feature engineering, walk-forward backtesting with realistic transaction costs, and automated risk reporting — with a look-ahead-safe engine enforced by design.
PythonPandasNumPyStreamlitTyperpytest
- Look-ahead-safe backtest engine — signal at
t, position att+1, enforced by construction, not convention - Realistic execution costs, walk-forward validation, and bootstrap/permutation testing for statistical honesty
- Three interfaces sharing one core: a Python API, a CLI, and an interactive Streamlit dashboard
Capabilities
Where I go deep
Three areas I keep coming back to, each explored from first principles.
Machine Learning & AI
Built from first principles — forward pass, backprop, and gradient descent by hand.
- Multi-layer perceptrons with manual forward pass, backprop, softmax cross-entropy, and L2 regularization — raw NumPy, no autograd
- K-Means built from scratch: vectorized distances, empty-cluster handling, majority-vote labeling
- Validation-based grid search across architecture, learning rate, batch size, and regularization
- Evaluation beyond accuracy — macro F1, confusion matrices, loss curves, runtime profiling
Quantitative Finance
Focused on the details that make backtests trustworthy.
- Look-ahead-safe engine — signal at
t, position att+1, enforced by construction - Realistic execution costs — commission, spread, slippage — gross vs. net reported separately
- Walk-forward validation plus bootstrap and permutation testing for statistical honesty
- Risk analytics from first principles — Sharpe, Sortino, Calmar, VaR/CVaR, alpha/beta
Systems & Low-Level
From CPU design in Verilog to the assembly code running on it.
- Designed a 32-bit multicycle RISC-V CPU in Verilog — datapath, control FSM, interrupts, memory-mapped I/O
- Hand-wrote Conway's Game of Life in RISC-V assembly, running on simulated hardware
- Verified designs with Verilator simulation and GTKWave waveform debugging
- Built real-time multi-user systems in Scala with concurrency-safe state machines